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Hot Chips Conference, Santa Clara, CA – In a move poised to redefine enterprise computing, IBM today unveiled a revolutionary mainframe processor at the prestigious Hot Chips conference. This groundbreaking chip marks perhaps the most significant architectural shift in mainframe history, featuring cores capable of natively executing both IBM’s proprietary instruction set and Arm’s widely adopted architecture, seamlessly switching between the two in mere nanoseconds. This pioneering dual-architecture processor will power the next generation of IBM Z and LinuxONE systems, representing the first time such a capability has been integrated into a mainframe.
The strategic imperative behind this innovation is clear: to empower enterprises to run the vast and rapidly expanding ecosystem of Arm-native Linux software, including the artificial intelligence (AI) frameworks that are increasingly central to modern infrastructure, directly alongside the z/OS transaction-processing workloads that form the bedrock of global financial institutions, insurance companies, and government agencies. This integration promises to bridge the gap between the established reliability of mainframes and the cutting-edge capabilities of the Arm ecosystem.
"As technology enthusiasts on both sides, we’re really excited about being what I would consider one of the most powerful commercially available processors that’ll be dual architecture," stated Tina Tarquinio, chief product officer for IBM Z and LinuxONE, in an exclusive interview with VentureBeat. Her enthusiasm underscores the transformative potential of this development.
This announcement represents the first tangible hardware milestone stemming from the strategic collaboration between IBM and Arm, which was initially revealed in April. It directly addresses a long-standing question that has loomed over the mainframe’s relevance: can the machine responsible for processing the majority of the world’s regulated financial transactions maintain its status as a first-class citizen in an AI-driven era that has largely been built upon other companies’ silicon?
Engineering a Bilingual Processor Core: A Paradigm Shift in Design
The most striking aspect of IBM’s engineering approach is what the company deliberately chose not to do. Rather than adopting a simpler, more conventional strategy of attaching a few standalone Arm cores to its processor – a method employed by other chipmakers for heterogeneous computing – IBM has engineered every core on this new chip to be inherently bilingual.
"On this chip are 11 cores, and each core can dynamically switch back and forth between Arm software mode and traditional Z software mode," explained one of the lead engineers, speaking under condition of anonymity due to the early stage of the announcement. "That enables us to run the mission-critical enterprise software right next, on the same chip, to the much broader software ecosystem of Arm applications."
This remarkable feat of engineering is made possible through the utilization of the open-source KVM hypervisor. Enterprises will be able to run Arm64 Linux virtual machines and Linux on Z virtual machines concurrently. As the hypervisor dispatches each virtual machine to a physical core, that core dynamically reconfigures itself to operate in the corresponding architectural mode. The performance impact of this rapid switching, according to IBM engineers, is negligible. "That switch takes about the nanosecond scale," they noted. "Because you’re running for many milliseconds in the virtual image, this switching overhead sort of amortizes to zero – pretty much no impact at all."
Traditional z/OS workloads will continue to operate within their own dedicated partitions on the same chip, separate from the KVM-managed environments. This means that a bank’s core ledger system, its sophisticated fraud detection models, and a modern Arm-native monitoring stack can all coexist on the same silicon, sharing the same memory fabric and benefiting from the mainframe’s renowned reliability guarantees. The decision to pursue this deeply integrated approach, rather than a more superficial integration of Arm cores, was a deliberate one, stemming from a desire to maintain the platform’s characteristic qualities of service. "We’re really not addressing their need if we just have a few, I’d say, loosely Arm cores in the corner of the chip," the engineer elaborated. "It really needed to be deeply integrated into the entire system design for it to have the same qualities of service that clients are used to."
The technical specifications of this new processor are testament to its high-performance design. Fabricated on a cutting-edge 2-nanometer process node, the chip features 11 high-performance cores operating at a base frequency exceeding 5.7 GHz – an exceptionally high clock speed by industry standards. It also incorporates on-chip AI inference accelerators specifically designed for in-transaction fraud detection, a dedicated data processing unit for I/O acceleration, and an extensive cache architecture. When scaled into full systems, these mainframes will support hundreds of cores and tens of terabytes of memory. "That’s really, really fast compared to what you otherwise get in the industry," the engineer emphasized. "It’s just another example of how mainframe technology is not old technology. It’s very modern, leading-edge technology."
The Strategic Imperative: Tapping into Arm’s Vast Developer Ecosystem
The strategic rationale behind this dual-architecture processor is fundamentally rooted in software, rather than hardware alone. IBM’s s390x architecture underpins an enormous proportion of the world’s mission-critical financial transactions. However, the broader landscape of enterprise software – encompassing monitoring tools, security agents, cloud-native middleware, and critically, the AI stack including frameworks like PyTorch and ONNX Runtime, as well as containerized workloads – has increasingly been developed for x86 and, significantly, for Arm. By Arm’s own estimations, nearly half of the compute shipped to major hyperscalers in 2025 is projected to be Arm-based, driven by the adoption of solutions like AWS Graviton, Google Axion, and Microsoft’s custom Arm silicon. Arm boasts a global developer community exceeding 22 million individuals.
Historically, porting each application to the s390x architecture has been a laborious, one-independent-software-vendor (ISV) at a time undertaking. Tina Tarquinio of IBM Z and LinuxONE candidly described the situation: "No matter how great our ecosystem team is, we would never be able to work with all of them and port them all. There’s a lot of ISVs out there, and so we wanted to make a fundamental, big step-function forward. We took a swing from a technology point of view."
Significantly, Tarquinio noted that customers were not explicitly requesting a dual-architecture chip. Instead, their needs revolved around achieving specific business outcomes. "I wouldn’t say our clients were saying, ‘Can you please make me a dual-architecture environment?’ But they were saying, ‘Help me get these surround workloads, or different types of workloads, to run in a quicker-to-market fashion.’" This dual-architecture processor is IBM’s response to that demand for agility and accelerated time-to-market for diverse workloads.
The compatibility promise is ambitious: Arm Linux binaries are expected to run without modification. "The new Arm capabilities are designed to be 100% binary compatible," stated IBM’s lead engineer. "Once you have, for example, Red Hat Linux for Arm, and you have applications that run on Red Hat Linux for Arm, they will run on the system without modifications." Arm provides the definitive specification for its instruction set architecture and offers validation tooling to ensure IBM’s implementation aligns precisely with all other Arm chips. IBM, in turn, has designed and manufactured the silicon entirely in-house. "Very good partnership. Very solid engineering partnership as well," was the assessment of the collaboration.
Advancing Enterprise AI on the Mainframe with Next-Generation Spyre Accelerators
Coinciding with this processor announcement, IBM is also previewing the next iteration of its Spyre AI accelerator at Hot Chips. This pairing is strategically significant. The current mainframe architecture already offers a two-tiered approach to AI: an on-processor accelerator, first introduced with the Telum chip in 2022, which handles ultra-low-latency inference tasks such as real-time fraud scoring within payment transactions; and the Spyre accelerator card, integrated into the I/O subsystem, for more demanding AI models.
The new Spyre accelerator represents a substantial leap forward, significantly expanding the platform’s AI capabilities. "We’re also bringing a much higher performance chip that is capable of running large language models for agentic workflows," explained the IBM engineer. These agentic workflows encompass both AI-operations (AI-ops) tasks involved in system administration and broader business workflows, such as "document understanding and insurance adjudication." The forthcoming accelerator will be equipped with high-bandwidth memory to efficiently feed these sophisticated AI models.
This convergence of the dual-architecture strategy and IBM’s AI advancements is crucial. Enterprises are increasingly seeking to run AI inference in close proximity to their data. Given that the world’s most critical data resides on mainframes, and the dominant AI tooling is overwhelmingly Arm-native, this new processor architecture provides an ideal solution. Mohamed Awad, Arm’s executive vice president for cloud AI, articulated this synergy: "As AI scales, more of the computing landscape is converging on Arm. Bringing Arm compute and its software ecosystem to these platforms will extend that momentum into mission-critical enterprise infrastructure to give organizations greater choice in how they deploy AI."
The timing of this announcement aligns with the current trajectory of enterprise AI adoption. A recent McKinsey survey, "The State of AI," revealed that while 88% of organizations are now employing AI in at least one business function, nearly two-thirds have not yet scaled its implementation across their entire enterprise. The companies that are realizing the most significant value are those that are fundamentally redesigning their core workflows, rather than relying on isolated pilot projects. For regulated industries, where systems of record are housed on IBM Z, running AI directly where transactions occur represents perhaps the most direct and impactful path to this level of integration.
Availability and the Future of IBM Z and LinuxONE
Customers will need to exercise some patience, as the new dual-architecture processor is slated to debut in the successor to the z17, which was released in the second quarter of 2025. Given IBM’s historical product cadence of approximately three years, a launch around 2028 is anticipated. However, Tarquinio emphasized that the project is well beyond the conceptual stage. "It’s more than being on the drawing board. We’re full steam ahead on the whole system," she asserted, indicating that IBM will release further details as the launch approaches.
For IBM’s existing customer base, a natural question arises: does the embrace of Arm signal a gradual phasing out of the traditional mainframe architecture? Both IBM executives firmly rejected this notion. "This is a big and. It is not an or," Tarquinio stated emphatically. "I have a roadmap that goes out 10 or 15 years of hardware systems. Many of our teams are working on this next system; many are also working on the one after that, and the one after that."
Jacobi framed the move as an evolution rather than a revolution. "The traditional mainframe that we have today as a z17 system is not just a faster version of what we built 25 years ago," he explained. "We didn’t have pervasive encryption capabilities. We didn’t have on-processor AI capabilities. Adding the Arm capability is the next big iteration in this continuous evolution."
The competitive landscape, particularly concerning the cloud, is a significant subtext to this announcement. When asked why an enterprise would opt to run Arm workloads on a mainframe instead of a hyperscale cloud provider, Tarquinio highlighted the mainframe’s unparalleled availability figures: "We’re talking eight nines of availability – that’s 0.3 seconds of downtime a year. If you’re running your ledger, if you’re running your fraud detection, any of these mission-critical apps, you want that." The core value proposition, she argued, is fitness for purpose: matching the infrastructure to the required service level agreement (SLA), rather than succumbing to prevailing technological trends.
While the ambition is clear, there are inherent challenges. IBM’s official press release acknowledges that statements regarding future directions "represent goals and objectives only." Currently, the Arm support is limited to Linux environments. The most significant engineering hurdles – achieving production-level performance for a foreign instruction set, ensuring mainframe-grade fault detection and recovery, and validating this under real-world customer workloads – remain to be definitively proven over the coming years.
Nevertheless, the ambition of this initiative is undeniable. For sixty years, the mainframe has consistently defied predictions of its demise, surviving waves of technological disruption including minicomputers, client-server architectures, and the cloud, by intelligently integrating beneficial aspects of each. Now, IBM is embarking on its most ambitious integration yet: teaching the machine that underpins the global financial system to fluently and natively speak the language of the AI era, all on the same silicon. "Bringing something that’ll really be first of its kind in production," Tarquinio concluded, "showcases again what IBM is capable of from a technology point of view." The mainframe, it appears, is not being left behind by the future; it is actively learning to run it.
